The present invention relates generally to a clamping circuit for a switch FET transistor and more particularly a clamping device for a switch FET coupled to a control solenoid of an ABS braking system for an automobile.
Power FETs are widely used in the automotive industry and are utilized to drive the solenoid valves in antilock brake systems (ABS), for example. In designing power FETs for use with inductive loads, it is common to utilize two techniques to protect the FET from the voltage spike created when power is suddenly switched off in an inductor. FIG. 1 shows such a circuit generally as 100. The inductor 104 is coupled between a source of power 102 and a power FET 106 which is also coupled to ground. The gate of the FET is coupled to a node 126 which is coupled to current source 122 via switch 124 which is also coupled to a source of positive power 120. Node 126 is further coupled to a current sink 128 which is coupled to ground 132 via switch 130. The current flowing through the current sink 128 and the gate capacitance determines the speed in which the transistor can be turned off. In addition, node 110 is coupled between the inductor and the drain of transistor 106 and it has a reverse breakdown diode 112 and a forward diode 114 coupled between the drain and node 126 which is coupled to the gate of the FET. The breakdown voltage of the diode 112 and the forward voltage drop of diode 114 are chosen so that the FET 106 can be driven into conduction before the drain voltage reaches the avalanche voltage of the power FET. This causes the FET to act as a clamp and protect itself against the damage that would be created when it enters the avalanche mode. The FET device is able to dissipate the stored inductive energy without the use of external circuits and without damage to the FET.
A circuit of this type, which includes a current limiting circuit for the current through the power FET is shown in the U.S. Pat. No. 6,169,439, for example.
In certain ABS braking systems, it is desirable to pulse width modulate the signal to the solenoid in order to control the antilock function. In order to be able to switch at the speed required for the pulse width modulation control of the solenoid, the slew rate control to prevent the inductive spike cannot be used. Currently, these circuits use discrete power FETs and the discrete clamp diode devices to meet this requirement. It is desirable to integrate the FETs in order that a plurality of FETs be available in a single package which will be available at a reduced price and which will reduce the manufacturing costs for the printed circuit board. One problem is that it is necessary to measure the BVdss of the device in order that it meet reliability requirements and will not fail in normal operation. One way to perform this test is to add a resistor in series with the diodes 112, 114. The slope of the line on a curve tracer is then determined by the resistance value, which will go to essentially zero when the transistor enters the avalanche breakdown mode. Adding a series resistor, however, reduces the current flow through the clamping diode so that it may not provide enough current under certain test conditions to turn the transistor on to act as a self clamp. This could be overcome by reducing the value of the series resistor, but this increases the current flow through the clamping diode, and requires that the size of the diodes be increased. As will be shown later in connection with FIG. 2, it is common to have more than the two diodes shown in FIG. 1 in the diode chain. Therefore, all the diodes of the chain would have to be increased in size, which unnecessarily uses the valuable real estate on the integrated circuit chip. A typical series resistor would be 10K ohms, for example. In order to have the circuit turn on the power FET to clamp the voltage below its avalanche voltage, the series resistance might have to be reduced to 100 ohms, for example. This would require a doubling of the area of the diodes in the clamping diode chain.